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From 86ce810ec5463f41d001b543288bd43dda79eebd Mon Sep 17 00:00:00 2001
From: Michael Forney <mforney@mforney.org>
Date: Thu, 9 May 2019 23:32:15 -0700
Subject: [PATCH] arm64: Handle slots in Ocopy operands
---
arm64/emit.c | 25 +++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arm64/emit.c b/arm64/emit.c
index e7effef..adae233 100644
--- a/arm64/emit.c
+++ b/arm64/emit.c
@@ -218,8 +218,8 @@ emitf(char *s, Ins *i, E *e)
break;
case 'M':
c = *s++;
- assert(c == '0' || c == '1');
- r = i->arg[c - '0'];
+ assert(c == '0' || c == '1' || c == '=');
+ r = c == '=' ? i->to : i->arg[c - '0'];
switch (rtype(r)) {
default:
die("TODO emit non reg addresses");
@@ -305,9 +305,26 @@ emitins(Ins *i, E *e)
case Ocopy:
if (req(i->to, i->arg[0]))
break;
- if (rtype(i->arg[0]) != RCon)
+ if (rtype(i->to) == RSlot) {
+ if (rtype(i->arg[0]) == RSlot) {
+ emitf("ldr %?, %M0\n\tstr %?, %M=", i, e);
+ } else {
+ assert(isreg(i->arg[0]));
+ emitf("str %0, %M=", i, e);
+ }
+ break;
+ }
+ assert(isreg(i->to));
+ switch (rtype(i->arg[0])) {
+ case RCon:
+ loadcon(&e->fn->con[i->arg[0].val], i->to.val, i->cls, e->f);
+ break;
+ case RSlot:
+ emitf("ldr %=, %M0", i, e);
+ break;
+ default:
goto Table;
- loadcon(&e->fn->con[i->arg[0].val], i->to.val, i->cls, e->f);
+ }
break;
case Oaddr:
assert(rtype(i->arg[0]) == RSlot);
--
2.21.0
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