qbe: Update to latest git

Drop patch for zeroizing registers.

5 files changed, 52 insertions, 85 deletions

diff --git a/pkg/qbe/gen.lua b/pkg/qbe/gen.lua
index ca58652e..12e2dacd 100644
--- a/pkg/qbe/gen.lua
+++ b/pkg/qbe/gen.lua
@@ -6,7 +6,7 @@ cflags{
 
 exe('qbe', [[
 	main.c util.c parse.c abi.c cfg.c mem.c ssa.c alias.c load.c
-	copy.c fold.c simpl.c live.c spill.c rega.c emit.c
+	copy.c fold.c gvn.c gcm.c simpl.c live.c spill.c rega.c emit.c
 	amd64/(targ.c sysv.c isel.c emit.c)
 	arm64/(targ.c abi.c isel.c emit.c)
 	rv64/(targ.c abi.c isel.c emit.c)
diff --git a/pkg/qbe/patch/0001-Fix-aliasing-violation.patch b/pkg/qbe/patch/0001-Fix-aliasing-violation.patch
new file mode 100644
index 00000000..291a63f2
--- /dev/null
+++ b/pkg/qbe/patch/0001-Fix-aliasing-violation.patch
@@ -0,0 +1,50 @@
+From 70d0e4d5052565eb7124d00542249c0059c26378 Mon Sep 17 00:00:00 2001
+From: Michael Forney <mforney@mforney.org>
+Date: Mon, 28 Apr 2025 22:44:49 -0700
+Subject: [PATCH] Fix aliasing violation
+
+---
+ emit.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/emit.c b/emit.c
+index 04837a5..19fd56d 100644
+--- a/emit.c
++++ b/emit.c
+@@ -155,7 +155,7 @@ emitfin(FILE *f, char *sec[3])
+ {
+ 	Asmbits *b;
+ 	int lg, i;
+-	union { int32_t i; float f; } u;
++	union { int32_t i32; float f32; int64_t i64; double f64; } u;
+ 
+ 	if (!stash)
+ 		return;
+@@ -174,18 +174,18 @@ emitfin(FILE *f, char *sec[3])
+ 						"\n\t.quad %"PRId64
+ 						"\n\t.quad 0\n\n",
+ 						(int64_t)b->n);
+-				else if (lg == 3)
++				else if (lg == 3) {
++					u.i64 = b->n;
+ 					fprintf(f,
+ 						"\n\t.quad %"PRId64
+ 						" /* %f */\n\n",
+-						(int64_t)b->n,
+-						*(double *)&b->n);
+-				else if (lg == 2) {
+-					u.i = b->n;
++						u.i64, u.f64);
++				} else if (lg == 2) {
++					u.i32 = b->n;
+ 					fprintf(f,
+ 						"\n\t.int %"PRId32
+ 						" /* %f */\n\n",
+-						u.i, (double)u.f);
++						u.i32, u.f32);
+ 				}
+ 			}
+ 		}
+-- 
+2.45.2
+
diff --git a/pkg/qbe/patch/0001-amd64-optimize-loading-0-into-registers.patch b/pkg/qbe/patch/0001-amd64-optimize-loading-0-into-registers.patch
deleted file mode 100644
index e7d5d5b5..00000000
--- a/pkg/qbe/patch/0001-amd64-optimize-loading-0-into-registers.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 55b93f727cbad62a13dce0136077b0ffb47b90d7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=89rico=20Nogueira?= <erico.erc@gmail.com>
-Date: Sun, 11 Jul 2021 19:19:12 -0300
-Subject: [PATCH] amd64: optimize loading 0 into registers
-
-Loading +0 into a floating point register can be done using pxor or
-xorps instructions. Per [1], we went with pxor because it can run on all
-vector ALU ports, even if it's one byte longer.
-
-Similarly, an integer register can be zeroed with xor, which has a
-smaller encoding than mov with 0 immediate.
-
-To implement this, we special case fixarg to allow Ocopy when the
-value is +0 for floating point, and change emitins to emit pxor/xor
-when it encounters a copy from 0.
-
-Co-authored-by: Michael Forney <mforney@mforney.org>
-
-[1] https://stackoverflow.com/questions/39811577/does-using-mix-of-pxor-and-xorps-affect-performance/39828976
----
- amd64/emit.c | 12 ++++++++++++
- amd64/isel.c | 12 +++++++-----
- 2 files changed, 19 insertions(+), 5 deletions(-)
-
-diff --git a/amd64/emit.c b/amd64/emit.c
-index 51d1a5c..a3e72e6 100644
---- a/amd64/emit.c
-+++ b/amd64/emit.c
-@@ -458,6 +458,18 @@ emitins(Ins i, Fn *fn, FILE *f)
- 		if (req(i.to, i.arg[0]))
- 			break;
- 		t0 = rtype(i.arg[0]);
-+		if (t0 == RCon
-+		&& fn->con[i.arg[0].val].type == CBits
-+		&& fn->con[i.arg[0].val].bits.i == 0) {
-+			if (isreg(i.to)) {
-+				if (KBASE(i.cls) == 0)
-+					emitf("xor%k %=, %=", &i, fn, f);
-+				else
-+					emitf("pxor %D=, %D=", &i, fn, f);
-+				break;
-+			}
-+			i.cls = KWIDE(i.cls) ? Kl : Kw;
-+		}
- 		if (i.cls == Kl
- 		&& t0 == RCon
- 		&& fn->con[i.arg[0].val].type == CBits) {
-diff --git a/amd64/isel.c b/amd64/isel.c
-index e29c8bf..4bec2e1 100644
---- a/amd64/isel.c
-+++ b/amd64/isel.c
-@@ -85,7 +85,7 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
- 	r1 = r0 = *r;
- 	s = rslot(r0, fn);
- 	op = i ? i->op : Ocopy;
--	if (KBASE(k) == 1 && rtype(r0) == RCon) {
-+	if (KBASE(k) == 1 && rtype(r0) == RCon && fn->con[r0.val].bits.i != 0) {
- 		/* load floating points from memory
- 		 * slots, they can't be used as
- 		 * immediates
-@@ -99,13 +99,15 @@ fixarg(Ref *r, int k, Ins *i, Fn *fn)
- 		a.offset.sym.id = intern(buf);
- 		fn->mem[fn->nmem-1] = a;
- 	}
--	else if (op != Ocopy && k == Kl && noimm(r0, fn)) {
-+	else if (op != Ocopy && ((k == Kl && noimm(r0, fn)) || (KBASE(k) == 1 && rtype(r0) == RCon))) {
- 		/* load constants that do not fit in
- 		 * a 32bit signed integer into a
--		 * long temporary
-+		 * long temporary OR
-+		 * load positive zero into a floating
-+		 * point register
- 		 */
--		r1 = newtmp("isel", Kl, fn);
--		emit(Ocopy, Kl, r1, r0, R);
-+		r1 = newtmp("isel", k, fn);
-+		emit(Ocopy, k, r1, r0, R);
- 	}
- 	else if (s != -1) {
- 		/* load fast locals' addresses into
--- 
-2.42.0
-
diff --git a/pkg/qbe/src b/pkg/qbe/src
-Subproject 99169df2ff4d92f67c7936ba6982d33670ea9a2
+Subproject 8d5b86ac4c24e24802a60e5e9df2dd5902fe0a5
diff --git a/pkg/qbe/ver b/pkg/qbe/ver
index bb62d07b..3cb0eb7b 100644
--- a/pkg/qbe/ver
+++ b/pkg/qbe/ver
@@ -1 +1 @@
-v1.2-5-gbe5d46fe7d r0
+v1.2-61-g8d5b86ac4c r0